74HC138N

The HC138 devices are designed to be used in high-performance memory-decoding or datarouting applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible.

•  Targeted Specifically for High-Speed Memory Decoders and Data-Transmission Systems
•   Wide Operating Voltage Range of 2 V to 6 V
•  Outputs Can Drive Up To 10 LSTTL Loads
•  Low Power Consumption, 80uA Max ICC
•  Typical tpd = 15 ns
•  4-mA Output Drive at 5 V
•  Low Input Current of 1uA Max
•  Incorporate Three Enable Inputs to Simplify Cascading and/or Data Reception
•   Datasheet http://www.ti.com/lit/ds/symlink/sn74hc138.pdf